Low-power and Small-area 4-ch 25-Gb/s Transimpedance Amplifiers in 65-nm CMOS Process

We present an area-efficient and low-power four-channel 25-Gb/s trans-impedance amplifier for Rx analog front-end (Rx-AFE) on optical receiver. The proposed circuit features a local negative-feedback (TIA) to expand the bandwidth. TIA post-amplifier use regulated cascode (RGC) topology two differential stages with inductive peaking bandwidth extension technique acquire 19.6 GHz of -3 dB 53.3 dBΩ gain. designed system using 65-nm CMOS process, Rx-AFE TIAs achieved small area 300 µm × 800 per lane. From measurement results, output voltage was 160 mV at PRBS31. test chip has also 85.0 mW power consumption; hence, it achieves 0.85 mW/Gb/s efficiency.